Analysis of Computer Organisation and Architecture

Questions: Answer the following questions: 1. How many 256*8 RAM chips are needed to provide a memory capacity of 4096 bytes? (a) How many bits will each address contain? (b) How many lines must go to each chip? (c) How many lines must be decoded for the chip select inputs? Specify the size of the decoder. 2. Write a program to evaluate the arithmetic statement x = (a( b + c ) d - e) using a stack organized computer with zero-address instructions (so only pop and push can access memory). 3. Consider a byte-addressable computer with 16-bit addresses, a cache capable of storing a total of 2K bytes of data, and blocks of 8 bytes. Show the format (include field names and sizes) of a 16-bit memory address for: (a) direct mapped (b) fully associative (c) 4-way set associative (d) Where (which block or set) in cache would the memory address BAD016be mapped for each of three mapping techniques above? You can specify the answer in decimal if you wish. 4. More registers appears to be a good thing, in terms of reducing the total number of memory accesses a program might require. Using the arithmetic expression S = (A+B)-(C+D), support this statement. [Hints: First, determine the number of memory accesses necessary using MARIE and the two registers for holding memory data values (AC and MBR). Then perform the same arithmetic computation for a processor that has more than three registers (for example, R1, R2, R3, R4) to hold memory data values]. 5. Suppose a process page table contains the entries shown below. Using the format shown in Table, indicate where the process pages are located in memory. Page Frame Valid Bit 0 -- 0 1 3 1 2 -- 0 3 -- 0 4 2 1 5 0 1 6 -- 0 7 1 1 6. Discuss the advantages and disadvantages of dynamic linking. 7. Suppose a disk drive has the following characteristics: 6 surfaces 953 tracks per surface 256 sectors per track 512 bytes/sector Tract-to-track seek time of 6.5 milliseconds Rotational speed of 5,400 RPM. (a) What is the capacity of the drive? (b) What is the access time? 8. Suppose you have the instruction Add 800. The memory contents are given below, and the contents of AC and the base register are 200 and 100 respectively. Memory address value 800 900 900 1000 1000 500 1100 600 1200 800 1300 250 What would be loaded into the AC if the addressing mode for the operand is: (a) immediate (b) direct (c)indirect (d)indexed Answers: 1Total memory capacity is 4096 bytes, each chip capacity is 256*8 bytes, so 2 chips are required to address 4096 bytes of memory. (a) 12 (4096 bytes can addressed using 212-1, so 12 bites are required) (b) 11 (Total address line number lines used to select chips) (c) 1, 1x2( 1 input line which is decoded into two select lines) 2.push a push x push b push + push c pop c pop b add b,c push b pop b pop a mul a,b push a push x push d pop d pop a mul a,d push a push - push e pop e pop a sub a,e 3. Capacity of Cache is 2k bytes and each block is 8 bytes, so number of cache blocks are 256. So represent 256 cache blocks 8 bytes are required.3 bits are used to represent the 8 bytes in each block (a)In direct method each memory block mapped to particular cache line, so it is inexpensive but lot of thrashing will happen if more number memory blocks compare to number of cache lines. 8 bits cache line, 3 bits for data in block, total 11 bits and rest of the 5 bits used for tag to identify the block. Tag (5) 8bits (cache block) 3 bits (block data) (b)In full associative, any block can go into any line of the cache. This means that the word id bits are used to identify which word in the block is needed, but the tag becomes all of the remaining bits Tag (13) 3 bits (block data) (c)It is like direct mapping only but difference is one memory block can go into 4 cache lines, can occupy any free line among these 4 lines, like this every memory block mapped to 4 cache lines.Now instead of line identifier, use bits for the set identifier. So 8 bits will become 6 bits because 256 cache line are grouped into 64 sets as it is 4 way set associative. Tag (7) 6bits (Cache sets) 3 bits(block data) (d)BAD0 == 1011 1010 1101 0000 Direct mapping: 720 Full Associative: 8,16, ...etc 4-way set associative: 832, 840,848,856 4. With AC and MBR Load A Add B Store A Load C Add D Store C Load A Sub C Memory references: 8 With R1, R2, R3, R4 registers Mov R1, A Mov R2, B Mov R3, C Mov R4, D Add R1,R2 Add R3,R4 sub R1,R3 Memory references: 4 Which is almost half. 5. Page 1 is located in the frame 3 of RAM and valid bit set so it is in RAM Page 4 is located in the frame 2 of RAM and valid bit set so it is in RAM age 5 is located in the frame 0 of RAM and valid bit set so it is in RAM Page 7 is located in the frame 7 of RAM and valid bit set so it is in RAM 6. Advantages: 1. Attaching the libraries dynamically to the executable, it needs less space on disk the executable to store. 2. Many executables can shares the same library dynamically 3. Any modifications to library does not demand the executable to recompile. Disadvantages: 1.Entire library has to be loaded if one function referenced from executable 7. (a)Total capacity = 6 * 953 * 256 * 512 = 749469696 bytes (b) Access time = tract-to-track seek time + seek time to reach sector = 6.5ms + (0.5*60*1000)/5400 ms = 6.5 + 5.5ms = 12ms 8. (a) Add 800, here it is Value, so AC value will become 200 + 800 = 1000 (b) Add 800, Here it is Address, so AC value will become 200 + 900 = 1100 (c) Add 800, Here it is Indirect address, so AC value will become 200 + Value at (Value at(800)) 200 + Value at ( 900) 200 + 1000 = 1200 (d) Add 800, Here it is value at (Base+800) AC value will become 200 + Value at(100 + 800) = 200 + 1000 = 1200.